Lab CMOS A/D Converter Design
| Vortragende/r (Mitwirkende/r) | |
|---|---|
| Nummer | 0000000957 |
| Art | Praktikum |
| Umfang | 5 SWS |
| Semester | Wintersemester 2025/26 |
| Unterrichtssprache | Englisch |
| Stellung in Studienplänen | Siehe TUMonline |
| Termine | Siehe TUMonline |
- 15.10.2025 15:00-16:00 N5325, Seminarraum , Kick-off. Participation is mandatory!
- 30.10.2025 10:30-11:30 N5325, Seminarraum
- 30.10.2025 13:00-14:00 N5325, Seminarraum
- 13.11.2025 10:30-11:30 N5325, Seminarraum
- 13.11.2025 13:00-14:00 N5325, Seminarraum
- 27.11.2025 10:30-11:30 N5325, Seminarraum
- 27.11.2025 13:00-14:00 N5325, Seminarraum
- 11.12.2025 10:30-11:30 N5325, Seminarraum
- 11.12.2025 13:00-14:00 N5325, Seminarraum
- 15.01.2026 10:30-11:30 N5325, Seminarraum
- 15.01.2026 13:00-14:00 N5325, Seminarraum
- 22.01.2026 10:30-11:30 N5325, Seminarraum
- 22.01.2026 13:00-14:00 N5325, Seminarraum
- 29.01.2026 10:30-11:30 N5325, Seminarraum
- 29.01.2026 13:00-14:00 N5325, Seminarraum
Teilnahmekriterien
Lernziele
Upon successful completion of the lab the students are able to design and verify transistor level integrated analog circuits and small systems using a circuit design software according to a given specification
Beschreibung
During this lab an A/D-converter will be designed. First, the archtitecture (Delta-Sigma ADC) will be investigated. Second, a conceptional model will be designed using Simulink/Matlab. Finally, the concept will be realized with the software Cadence/Virtuoso by considering non-idealities and performance limitations.
Inhaltliche Voraussetzungen
Solid-State and Semiconductor Device Physics, Analog and Mixed-Signal Electronics
Empfohlene Literatur
Working instructions and computer + software (Cadence Design environment) will be provided